CARIOCA - A Fast Binary Front-End Implemented in 0.25 m CMOS using a Novel Current-Mode Technique for the LHCb Muon Detector
نویسندگان
چکیده
The CARIOCA front-end is an amplifier discriminator chip, using 0.25Pm CMOS technology, developed with a very fast and low noise preamplifier. This prototype was designed to have input impedance below 10:. Measurements showed a peaking time of 14ns and noise of 450e at zero input capacitance, with a noise slope of 37.4 e/pF. The sensitivity of 8mV/fC remains almost unchanged up to a detector capacitance of 120pF.
منابع مشابه
CARIOCA - 0.25μm CMOS Fast Binary Front-End for Sensor Interface using a Novel Current-Mode Feedback Technique
We report on a very fast and low noise front-end, implemented in 0.25μm CMOS technology. The CARIOCA amplifier discriminator chip has input impedance of 10Ω, in order to be compatible with sensors of large capacitance, and a peaking time of 14ns. The conversion gain of 8mV/fC remains almost unchanged up to a detector capacitance of 120pF. A noise figure of 450e at zero input capacitance with a ...
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